我正在尝试用 绘制一个简单的电路circuitikz，但为了更好地满足我的需求，我不得不通过 修改所有组件的大小/tikz/circuitikz/bipoles/length=0.9cm（默认长度应为1.4cm）。但是，在下面的 mwe 中编译左侧的图形时，您会发现电压源的形状并不令人满意。
我合并了二 答案从 TeX.SE 尝试解决这个问题，但我得到了右边的图片，电压源的形状确实没问题，但它的标签被缩放，路径的起始坐标不在我预期的位置！我想这与选项有关，但我真的transform shape不知道如何规避这个问题并实现我想要的。
\documentclass[a4paper]{book}
\usepackage[english]{babel}
\usepackage[utf8]{inputenc}
\usepackage{pgfplots}
\usepgfplotslibrary{external}
\tikzexternalize[prefix=mwe-\overlaynumber-]
\tikzsetexternalprefix{tikzpics/}
\usetikzlibrary{3D, calc, external, positioning, circuits.logic.mux, shapes.gates.logic.US}
\usepackage[americaninductors]{circuitikz}
\begin{document}
\begin{figure}[h]
\centering
\begin{tikzpicture}[auto, node distance=4mm and 4mm, circuit logic,every node/.style={font=\tiny}, >=latex,%
/tikz/circuitikz/bipoles/length=0.9cm]
\def\nodedist{4mm}
\def\complen{9mm}
\ctikzset{tripoles/mos style/arrows, tripoles/nmos/arrow pos=0.8, tripoles/pmos/arrow pos=0.6,}
\draw (0,0) to [C, name=c] ++(\complen, 0) node[american not port, name=inv1, anchor=in] {};
\node (inv2) [right=of inv1, american not port] {};
\draw ({$(c.east)!.5!(inv1.in)$} |- inv1.in) to [short,*-] ++(0,.7*\complen) to [R] ({$(inv1.out)!.5!(inv2.in)$} |- {$(inv1.out)+(0,.7*\complen)$}) to [short,-*] ({$(inv1.out)!.5!(inv2.in)$} |- inv1.out);
\draw ({$(c.east)!.5!(inv1.in)$} |- inv1.in) to [american voltage source, l=$V_\textup{CM}$] ({$(c.east)!.5!(inv1.in)$} |- {$(inv1.in) + (0,-2*\complen)$});
\draw (inv1.out) -- (inv2.in);
\end{tikzpicture}\hfil
\begin{tikzpicture}[auto, node distance=4mm and 4mm, circuit logic,every node/.style={font=\tiny}, >=latex,%
/tikz/circuitikz/bipoles/length=0.9cm]
\def\nodedist{4mm}
\def\complen{9mm}
\ctikzset{tripoles/mos style/arrows, tripoles/nmos/arrow pos=0.8, tripoles/pmos/arrow pos=0.6,}
\draw (0,0) to [C, name=c] ++(\complen, 0) node[american not port, name=inv1, anchor=in] {};
\node (inv2) [right=of inv1, american not port] {};
\draw ({$(c.east)!.5!(inv1.in)$} |- inv1.in) to [short,*-] ++(0,.7*\complen) to [R] ({$(inv1.out)!.5!(inv2.in)$} |- {$(inv1.out)+(0,.7*\complen)$}) to [short,-*] ({$(inv1.out)!.5!(inv2.in)$} |- inv1.out);
\draw \pgfextra{\ctikzset{/tikz/circuitikz/bipoles/length=1.4cm, transform shape}} ({$(c.east)!.5!(inv1.in)$} |- inv1.in) to [american voltage source, l=$V_\textup{CM}$, scale=0.6] ({$(c.east)!.5!(inv1.in)$} |- {$(inv1.in) + (0,-2*\complen)$});
\draw (inv1.out) -- (inv2.in);
\end{tikzpicture}
\end{figure}
\end{document}
答案1
嗯---首先，正如手册中所说劈头，circuitikz并且内部电路库基本上不兼容。问题是有些键会相互覆盖，同时加载两者……让我引用一下：
无论如何，兼容性代码是一项尽力而为的任务，并且只经过了很少的测试——作者的建议是选择其中一个，而不要混合它们。
我提出了一个纯粹的circuitikz电路解决方案---我真的不知道如何使用内部库来实现它，所以我会把它交给别人。
注意我删除了与缩放问题无关的内容（代码中的注释）。我不确定您的目的是什么，所以我使用类样式方法制作了第二个图表，其中包含较小的组件，然后使用更改了“数字”坐标的大小scale（即，如果没有transform shape，它不会缩放节点和文本）。
\documentclass[a4paper]{book}
\usepackage[english]{babel}
\usepackage[T1]{fontenc}% utf8 is standard, T1 not, and you want it
\usepackage{pgfplots}\pgfplotsset{compat=1.18}%never omit the compact key
%\usepgfplotslibrary{external}
%\tikzexternalize[prefix=mwe-\overlaynumber-]% will break outside beamer
%\tikzsetexternalprefix{tikzpics/}
\usetikzlibrary{calc, positioning,}%removed internal circuits libraries
% it seems you want american shapes
\usepackage[americaninductors, american]{circuitikz}
\ctikzset{tripoles/mos style/arrows, tripoles/nmos/arrow pos=0.8, tripoles/pmos/arrow pos=0.6}
\ctikzset{bipoles/length=0.9cm}% This CAN'T BE CHANGED midway a path
% which such a small basic length we have to tweak the font of the generators
\ctikzset{bipoles/vsourceam/inner plus={\tiny $+$}}
\ctikzset{bipoles/vsourceam/inner minus={\tiny $-$}}
\ctikzset{logic ports=ieee}
\begin{document}
\centering
\begin{tikzpicture}[auto, node distance=4mm and 4mm,
every node/.style={font=\tiny},
>=latex,
scale=0.7, % coordinates are 0.7cm apart
baseline,
]
\draw (0,0) to[C=$C$, -*] ++(1,0) coordinate(c-r)
to[inline not, -*] ++(2,0) coordinate (not1-r)
to[inline not] ++(2,0);
% generator
\draw (c-r) to[V=$V_{\mathrm{CM}}$] ++(0,-3);
% feedback
\draw (c-r) -- ++(0,1) coordinate(tmp)
to[R] (tmp-|not1-r) -- (not1-r);
\end{tikzpicture}\quad
\ctikzset{resistors/scale=0.6, capacitors/scale=0.7,
logic ports/scale=0.8, sources/scale=0.8}
\begin{tikzpicture}[auto, node distance=4mm and 4mm,
every node/.style={font=\tiny},
>=latex,
scale=0.5, % coordinates are 0.5cm apart
baseline,
]
\draw (0,0) to[C=$C$, -*] ++(1,0) coordinate(c-r)
to[inline not, -*] ++(2,0) coordinate (not1-r)
to[inline not] ++(2,0);
% generator
\draw (c-r) to[V=$V_{\mathrm{CM}}$] ++(0,-3);
% feedback
\draw (c-r) -- ++(0,1) coordinate(tmp)
to[R] (tmp-|not1-r) -- (not1-r);
\end{tikzpicture}
\end{document}
PS 下次请发布一个 MWE，编译在标准分布中......