之前的 FPGA 允许 0xFFFFF 的内存量。较新的 FPGA 的内存量增加了一倍。
Linux pci 驱动程序能够为每个 pci 总线分配正确的内存空间。
[ 1.882289] pci 0000:01:00.0: BAR 0: assigned [mem 0xf8000000-0xf81fffff]
[ 1.882296] pci 0000:00:01.0: PCI bridge to [bus 01]
[ 1.882302] pci 0000:00:01.0: bridge window [mem 0xf8000000-0xf81fffff]
[ 1.882308] pci 0000:02:00.0: BAR 0: assigned [mem 0xf8200000-0xf83fffff]
[ 1.882315] pci 0000:00:04.0: PCI bridge to [bus 02]
[ 1.882319] pci 0000:00:04.0: bridge window [mem 0xf8200000-0xf83fffff]
然而，桥接器的可预取内存量只有所需大小的一半。它仍然与以前的硬件使用的大小相同。
[root@lsa /]# lspci -v -s 00:01.0
00:01.0 PCI bridge: Marvell Technology Group Ltd. Device 6820 (rev 0a) (prog-if 00 [Normal decode])
Flags: bus master, fast devsel, latency 0
Bus: primary=00, secondary=01, subordinate=01, sec-latency=0
Memory behind bridge: f8000000-f81fffff
Prefetchable memory behind bridge: 00000000-000fffff <-------------------
Capabilities: [40] Express Root Port (Slot+), MSI 00
[root@lsa /]# lspci -v -s 00:04.0
00:04.0 PCI bridge: Marvell Technology Group Ltd. Device 6820 (rev 0a) (prog-if 00 [Normal decode])
Flags: bus master, fast devsel, latency 0
Bus: primary=00, secondary=02, subordinate=02, sec-latency=0
Memory behind bridge: f8200000-f83fffff
Prefetchable memory behind bridge: 00000000-000fffff <-------------------
Capabilities: [40] Express Root Port (Slot+), MSI 00
如何将 PCI 桥的可预取内存的大小从 0xfffff 更改为 0x1fffff？