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Linux 系统可以实现部分超线程吗？

tag-icon • tag-icon linux virtual-machines kvm-virtualization hyperthreading pinning
Linux 系统可以实现部分超线程吗？

我有一台启用了超线程的 2*14 核服务器。这意味着我有 (2*14*2=28*2) 56 个 vCPU。

[root@supervision1 /]# dmidecode -t 4 | egrep 'Socket Designation|Count'
    Socket Designation: SOCKET 0
    Core Count: 14
    Thread Count: 28
    Socket Designation: SOCKET 1
    Core Count: 14
    Thread Count: 28
[root@supervision1 /]# lscpu
Architecture:          x86_64
CPU op-mode(s):        32-bit, 64-bit
Byte Order:            Little Endian
CPU(s):                56
On-line CPU(s) list:   0-55
Thread(s) per core:    2
Core(s) per socket:    14
Socket(s):             2
NUMA node(s):          2
Vendor ID:             GenuineIntel
CPU family:            6
Model:                 79
Model name:            Intel(R) Xeon(R) CPU E5-2680 v4 @ 2.40GHz
Stepping:              1
CPU MHz:               1204.980
CPU max MHz:           3300.0000
CPU min MHz:           1200.0000
BogoMIPS:              4788.62
Virtualization:        VT-x
L1d cache:             32K
L1i cache:             32K
L2 cache:              256K
L3 cache:              35840K
NUMA node0 CPU(s):     0-13,28-41
NUMA node1 CPU(s):     14-27,42-55
Flags:                 fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp lm constant_tsc arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc aperfmperf eagerfpu pni pclmulqdq dtes64 monitor ds_cpl vmx smx est tm2 ssse3 sdbg fma cx16 xtpr pdcm pcid dca sse4_1 sse4_2 x2apic movbe popcnt aes xsave avx f16c rdrand lahf_lm abm 3dnowprefetch epb cat_l3 cdp_l3 intel_ppin intel_pt tpr_shadow vnmi flexpriority ept vpid fsgsbase tsc_adjust bmi1 hle avx2 smep bmi2 erms invpcid rtm cqm rdt_a rdseed adx smap xsaveopt cqm_llc cqm_occup_llc cqm_mbm_total cqm_mbm_local dtherm ida arat pln pts

[root@supervision1 /]# virsh capabilities | grep 'cell\|cpu'
    <cpu>
    </cpu>
      <cells num='2'>
        <cell id='0'>
          <cpus num='28'>
            <cpu id='0' socket_id='0' core_id='0' siblings='0,28'/>
            <cpu id='1' socket_id='0' core_id='1' siblings='1,29'/>
            <cpu id='2' socket_id='0' core_id='2' siblings='2,30'/>
            <cpu id='3' socket_id='0' core_id='3' siblings='3,31'/>
            <cpu id='4' socket_id='0' core_id='4' siblings='4,32'/>
            <cpu id='5' socket_id='0' core_id='5' siblings='5,33'/>
            <cpu id='6' socket_id='0' core_id='6' siblings='6,34'/>
            <cpu id='7' socket_id='0' core_id='8' siblings='7,35'/>
            <cpu id='8' socket_id='0' core_id='9' siblings='8,36'/>
            <cpu id='9' socket_id='0' core_id='10' siblings='9,37'/>
            <cpu id='10' socket_id='0' core_id='11' siblings='10,38'/>
            <cpu id='11' socket_id='0' core_id='12' siblings='11,39'/>
            <cpu id='12' socket_id='0' core_id='13' siblings='12,40'/>
            <cpu id='13' socket_id='0' core_id='14' siblings='13,41'/>
            <cpu id='28' socket_id='0' core_id='0' siblings='0,28'/>
            <cpu id='29' socket_id='0' core_id='1' siblings='1,29'/>
            <cpu id='30' socket_id='0' core_id='2' siblings='2,30'/>
            <cpu id='31' socket_id='0' core_id='3' siblings='3,31'/>
            <cpu id='32' socket_id='0' core_id='4' siblings='4,32'/>
            <cpu id='33' socket_id='0' core_id='5' siblings='5,33'/>
            <cpu id='34' socket_id='0' core_id='6' siblings='6,34'/>
            <cpu id='35' socket_id='0' core_id='8' siblings='7,35'/>
            <cpu id='36' socket_id='0' core_id='9' siblings='8,36'/>
            <cpu id='37' socket_id='0' core_id='10' siblings='9,37'/>
            <cpu id='38' socket_id='0' core_id='11' siblings='10,38'/>
            <cpu id='39' socket_id='0' core_id='12' siblings='11,39'/>
            <cpu id='40' socket_id='0' core_id='13' siblings='12,40'/>
            <cpu id='41' socket_id='0' core_id='14' siblings='13,41'/>
          </cpus>
        </cell>
        <cell id='1'>
          <cpus num='28'>
            <cpu id='14' socket_id='1' core_id='0' siblings='14,42'/>
            <cpu id='15' socket_id='1' core_id='1' siblings='15,43'/>
            <cpu id='16' socket_id='1' core_id='2' siblings='16,44'/>
            <cpu id='17' socket_id='1' core_id='3' siblings='17,45'/>
            <cpu id='18' socket_id='1' core_id='4' siblings='18,46'/>
            <cpu id='19' socket_id='1' core_id='5' siblings='19,47'/>
            <cpu id='20' socket_id='1' core_id='6' siblings='20,48'/>
            <cpu id='21' socket_id='1' core_id='8' siblings='21,49'/>
            <cpu id='22' socket_id='1' core_id='9' siblings='22,50'/>
            <cpu id='23' socket_id='1' core_id='10' siblings='23,51'/>
            <cpu id='24' socket_id='1' core_id='11' siblings='24,52'/>
            <cpu id='25' socket_id='1' core_id='12' siblings='25,53'/>
            <cpu id='26' socket_id='1' core_id='13' siblings='26,54'/>
            <cpu id='27' socket_id='1' core_id='14' siblings='27,55'/>
            <cpu id='42' socket_id='1' core_id='0' siblings='14,42'/>
            <cpu id='43' socket_id='1' core_id='1' siblings='15,43'/>
            <cpu id='44' socket_id='1' core_id='2' siblings='16,44'/>
            <cpu id='45' socket_id='1' core_id='3' siblings='17,45'/>
            <cpu id='46' socket_id='1' core_id='4' siblings='18,46'/>
            <cpu id='47' socket_id='1' core_id='5' siblings='19,47'/>
            <cpu id='48' socket_id='1' core_id='6' siblings='20,48'/>
            <cpu id='49' socket_id='1' core_id='8' siblings='21,49'/>
            <cpu id='50' socket_id='1' core_id='9' siblings='22,50'/>
            <cpu id='51' socket_id='1' core_id='10' siblings='23,51'/>
            <cpu id='52' socket_id='1' core_id='11' siblings='24,52'/>
            <cpu id='53' socket_id='1' core_id='12' siblings='25,53'/>
            <cpu id='54' socket_id='1' core_id='13' siblings='26,54'/>
            <cpu id='55' socket_id='1' core_id='14' siblings='27,55'/>
          </cpus>
        </cell>
      </cells>
      <bank id='0' level='3' type='both' size='35' unit='MiB' cpus='0-13,28-41'/>
      <bank id='1' level='3' type='both' size='35' unit='MiB' cpus='14-27,42-55'/>
      <cpuselection/>
      <cpuselection/>

我在这个虚拟机管理程序上运行了 2 个虚拟机：

  • 具有 12 个 vCPU 的 vm1
  • 具有 6 个 vCPU 的 vm2

我没有配置任何 CPU 固定（不需要）。下面是 VM1 和 VM2 的一些 vcpus 信息

[root@supervision1 /]# virsh vcpupin vm1
VCPU: CPU Affinity
----------------------------------
   0: 0-55
   1: 0-55
   2: 0-55
   3: 0-55
   4: 0-55
   5: 0-55
   6: 0-55
   7: 0-55
   8: 0-55
   9: 0-55
  10: 0-55
  11: 0-55

[root@supervision1 /]# virsh vcpupin vm2
VCPU: CPU Affinity
----------------------------------
   0: 0-55
   1: 0-55
   2: 0-55
   3: 0-55
   4: 0-55
   5: 0-55

现在我必须部署一个新的 VM（vm3），它需要以下内容（来自 VM 软件供应商的要求）：

  • 超标题功能已禁用
  • 4 个 CPU，具有 CPU 固定功能

我该怎么办？似乎异构处理器已被弃用或通常不建议使用。

  • VCPUPIN：如果我在 VM3 XML 定义中使用 vcpupin，我会看到 CPU 固定是可以的，但是这些 CPU 不会从其他 VM 的 vCPU 中排除。
[root@supervision1 /]# virsh dumpxml vm3 | grep cpu
  <vcpu placement='static'>4</vcpu>
  <cputune>
    <vcpupin vcpu='0' cpuset='0'/>
    <vcpupin vcpu='1' cpuset='1'/>
    <vcpupin vcpu='2' cpuset='2'/>
    <vcpupin vcpu='3' cpuset='3'/>
  </cputune>
  <cpu>
  </cpu>

[root@supervision1 /]# virsh vcpupin vm3
VCPU: CPU Affinity
----------------------------------
   0: 0
   1: 1
   2: 2
   3: 3

即使我设法将这些 vCPU 限制到 VM3，相应的同级（28、29、30、31）也不会与 VM1 和 VM2 隔离。或者我可以将 vCPU0 固定到 cpuset 0、28，将 vCPU1 固定到 cpuset 1、28 等……但它们不会与 VM1 和 VM2 隔离（以具有类似超线程禁用的行为……）

我想还有其他我不知道的选项或参数吧？如能提供任何建议或帮助，我将不胜感激 :-) 或者也许我不能对这 3 个虚拟机使用相同的虚拟机管理程序？

亲切的问候，

伊曼纽尔

答案1

我找到了一种可以实现我想要的方法，尽管它不是很好，也不可扩展。我只是将 VM3 的 vCPU 固定到最后 4 个 CPU（4 对同级 CPU）：

[root@supervision1 ~]# virsh vcpupin vm3
VCPU: CPU Affinity
----------------------------------
   0: 24,52
   1: 25,53
   2: 26,54
   3: 27,55

[root@supervision1 ~]# virsh dumpxml vm3 | grep cpu
  <vcpu placement='static'>4</vcpu>
  <cputune>
    <vcpupin vcpu='0' cpuset='24,52'/>
    <vcpupin vcpu='1' cpuset='25,53'/>
    <vcpupin vcpu='2' cpuset='26,54'/>
    <vcpupin vcpu='3' cpuset='27,55'/>
    <emulatorpin cpuset='0-23,28-51'/>
  </cputune>
  <cpu>
  </cpu>

然后我需要改变 VM1 和 VM2 的定义（这不是很好......）以仅使用其他 CPU（0-23,28-51 兄弟）

[root@supervision1 ~]# virsh vcpupin vm1
VCPU: CPU Affinity
----------------------------------
   0: 0-23,28-51
   1: 0-23,28-51
   2: 0-23,28-51
   3: 0-23,28-51
   4: 0-23,28-51
   5: 0-23,28-51
   6: 0-23,28-51
   7: 0-23,28-51
   8: 0-23,28-51
   9: 0-23,28-51
  10: 0-23,28-51
  11: 0-23,28-51

[root@supervision1 ~]# virsh vcpupin vm2
VCPU: CPU Affinity
----------------------------------
   0: 0-23,28-51
   1: 0-23,28-51
   2: 0-23,28-51
   3: 0-23,28-51
   4: 0-23,28-51
   5: 0-23,28-51
[root@supervision1 ~]# virsh dumpxml vm1| grep cpu
  <vcpu placement='static'>12</vcpu>
  <cputune>
    <vcpupin vcpu='0' cpuset='0-23,28-51'/>
    <vcpupin vcpu='1' cpuset='0-23,28-51'/>
    <vcpupin vcpu='2' cpuset='0-23,28-51'/>
    <vcpupin vcpu='3' cpuset='0-23,28-51'/>
    <vcpupin vcpu='4' cpuset='0-23,28-51'/>
    <vcpupin vcpu='5' cpuset='0-23,28-51'/>
    <vcpupin vcpu='6' cpuset='0-23,28-51'/>
    <vcpupin vcpu='7' cpuset='0-23,28-51'/>
    <vcpupin vcpu='8' cpuset='0-23,28-51'/>
    <vcpupin vcpu='9' cpuset='0-23,28-51'/>
    <vcpupin vcpu='10' cpuset='0-23,28-51'/>
    <vcpupin vcpu='11' cpuset='0-23,28-51'/>
    <emulatorpin cpuset='0-23,28-51'/>
  </cputune>
  <cpu mode='custom' match='exact' check='full'>
  </cpu>
[root@supervision1 ~]# virsh dumpxml vm2| grep cpu
  <vcpu placement='static'>6</vcpu>
  <cputune>
    <vcpupin vcpu='0' cpuset='0-23,28-51'/>
    <vcpupin vcpu='1' cpuset='0-23,28-51'/>
    <vcpupin vcpu='2' cpuset='0-23,28-51'/>
    <vcpupin vcpu='3' cpuset='0-23,28-51'/>
    <vcpupin vcpu='4' cpuset='0-23,28-51'/>
    <vcpupin vcpu='5' cpuset='0-23,28-51'/>
    <emulatorpin cpuset='0-23,28-51'/>
  </cputune>
  <cpu mode='custom' match='exact' check='full'>
  </cpu>

注意：我还将仿真器引脚设置为使用 VM3 未使用的 CPU 至少我认为这回答了我的问题。如果有人有更好的想法或意见，我将非常乐意阅读！

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